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PCI_CONF_READ(9)         BSD Kernel Developer's Manual        PCI_CONF_READ(9)

NAME
     pci_make_tag, pci_decompose_tag, pci_conf_read, pci_conf_write -- PCI
     config space manipulation functions

SYNOPSIS
     #include <&lt;alpha/pci/pci_machdep.h>&gt;
     #include <&lt;i386/pci/pci_machdep.h>&gt;
     #include <&lt;powerpc/pci/pci_machdep.h>&gt;
     #include <&lt;sgi/pci/pci_machdep.h>&gt;
     #include <&lt;machine/pci_machdep.h>&gt;

     pcitag_t
     pci_make_tag(pci_chipset_tag_t pc, int bus, int dev, int func);

     void
     pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *busp,
         int *devp, int *funcp);

     pcireg_t
     pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg);

     void
     pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
         pcireg_t val);

DESCRIPTION
     These functions provide a way to access PCI configuration space.

     The following types are defined in the machine dependent include file
     <pci_machdep.h>.

           pci_chipset_tag_t  a PCI chipset descriptor;
           pcitag_t           a PCI device tag;
           pcireg_t           a PCI register datum.

     In order to access PCI configuration space, a device tag shall be made
     using pci_make_tag given the PCI chipset tag pc and the device specifica-
     tion in a tuple of bus, device, function.  The PCI tag composition is a
     PCI chipset dependent operation although often as simple as a shift and
     logical OR combination.

     The pci_decompose_tag provides a reverse operation.  Once a tag is com-
     posed, it is possible to perform configuration space read and write with
     pci_conf_read and pci_conf_write, respectively.  Access to PCI configura-
     tion space is only provided for whole pcireg_t items, which is usually a
     32-bit integer.  Access to non-existent PCI devices do not (or should
     not) generate any kinds of faults or interruptions and thus allow for an
     easy device scanning by cycling through all possible device and function
     numbers for a given bus.

     Below is an overview of defined PCI configuration space registers for
     devices:

           0x00  Vendor (lower word) and Product (higher word) identification
                 (see /sys/dev/pci/pcidevs for a comprehensive list).

           0x04  Commands and Status register.

           0x08  PCI device's class and subclass IDs.  See
                 /sys/dev/pci/pcireg.h for PCI_CLASS_* and PCI_SUBCLASS_* def-
                 initions.

           0x0c  Specify (low byte to high): cache line size, PCI latency
                 timer, header type, and BIST.

           0x10 - 0x28
                 Base address registers for I/O and memory space mapped regis-
                 ters.

           0x28  CardBus CIS register.

           0x2c  Similar to 0x00 register's definitions for a subsystem iden-
                 tification.

           0x34  A pointer to the capabilities list.  Each item is an offset
                 in the configuration space itself.

           0x3c  Interrupt line and pin numbers.

SEE ALSO
     cardbus(4), pci(4), pci_intr_map(9)

HISTORY
     These functions first appeared in OpenBSD 1.2.

BSD                            February 15, 2015                           BSD