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IFLASH2_MTD(4)             Kernel Interfaces Manual             IFLASH2_MTD(4)

       iflash2_mtd - memory technology driver for Intel Series 2 flash

       insmod    iflash2_mtd.o   [pc_debug=n]   [mem_speed=n]   [word_width=n]
       [vpp_timeout_period=n] [vpp_settle=n] [erase_timeout=n] [erase_limit=n]
       [retry_limit=n] [max_tries=n] [mem_speed=n] [word_width=n]

       Iflash2_mtd is a memory technology driver for Intel Series 2 and Series
       100 flash devices.  Memory technology drivers are used by Card Services
       to provide device-independent access for memory cards through bulk mem-
       ory services.

       Writing to Series 2 and Series 100  flash  devices  is  very  processor
       intensive.   Individual  words are written one at a time, at a speed of
       roughly 10 us per word.  This busy period  is  too  short  to  schedule
       other  processes  to  run,  so  the driver will not yield the processor
       until an entire block is written.

              Selects the PCMCIA debugging  level.   This  parameter  is  only
              available  if  the module is compiled with debugging enabled.  A
              non-zero value enables debugging.

              Sets the access speed of shared memory windows, in  nanoseconds.
              The  default is 0 (i.e., no extra wait states).  Values of up to
              1000 are legal.

              A flag indicating if memory windows  should  be  configured  for
              8-bit  (if  0)  or  16-bit  (if  1) transfers.  The default is 1

              In milliseconds, this specifies the maximum idle period after  a
              write  operation  before programming power will be switched off.
              The default is 1000 ms.

              In milliseconds, this gives a  delay  between  when  programming
              power  is switched on, and when the device is assumed to be pow-
              ered up and ready to  receive  erase  or  write  commands.   The
              default is 100 ms.

              In  milliseconds, specifies the poll interval for monitoring the
              status of a bulk erase operation.  The default is 100 ms.

              In milliseconds, specifies the maximum elapsed  time  before  an
              erase operation is assumed to have failed.  The default is 10000

              The maximum number  of  retries  for  a  write  operation.   The
              default is 4.

              The maximum number of status register polls before a single word
              write is assumed to have timed out.  The default is 4096.

       This man page describes the standalone PCMCIA drivers provided  by  the
       pcmcia-cs source, not the PCMCIA kernel driver support that is included
       in the 2.4 (and later) linux kernel.  While the kernel PCMCIA code  has
       the  same  functionality  as  the  driver side of the standalone PCMCIA
       package, there are some important differences.  Therefore, some or  all
       of this documentation might not apply to the kernel drivers.

       David Hinds - dahindsATusers.net

       iflash2+_mtd(4), memory_cs(4).

pcmcia-cs                     2000/06/12 21:24:48               IFLASH2_MTD(4)