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OPENSSL_ia32cap(3SSL)               OpenSSL              OPENSSL_ia32cap(3SSL)

       OPENSSL_ia32cap - finding the IA-32 processor capabilities

        unsigned long *OPENSSL_ia32cap_loc(void);
        #define OPENSSL_ia32cap (*(OPENSSL_ia32cap_loc()))

       Value returned by OPENSSL_ia32cap_loc() is address of a variable
       containing IA-32 processor capabilities bit vector as it appears in EDX
       register after executing CPUID instruction with EAX=1 input value (see
       Intel Application Note #241618). Naturally it's meaningful on IA-32[E]
       platforms only. The variable is normally set up automatically upon
       toolkit initialization, but can be manipulated afterwards to modify
       crypto library behaviour. For the moment of this writing three bits are
       significant, namely bit #28 denoting Hyperthreading, which is used to
       distinguish Intel P4 core, bit #26 denoting SSE2 support, and bit #4
       denoting presence of Time-Stamp Counter. Clearing bit #26 at run-time
       for example disables high-performance SSE2 code present in the crypto
       library. You might have to do this if target OpenSSL application is
       executed on SSE2 capable CPU, but under control of OS which does not
       support SSE2 extentions. Even though you can manipulate the value
       programmatically, you most likely will find it more appropriate to set
       up an environment variable with the same name prior starting target
       application, e.g. 'env OPENSSL_ia32cap=0x10 apps/openssl', to achieve
       same effect without modifying the application source code.
       Alternatively you can reconfigure the toolkit with no-sse2 option and

0.9.8g                            2005-06-23             OPENSSL_ia32cap(3SSL)