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OLD-MAKE(1)                 General Commands Manual                OLD-MAKE(1)



NAME
       old-make - maintain, update, and regenerate groups of programs

SYNOPSIS
       /usr/old/make [ -f makefile ] ...  [ -bdeikmnpqrsSt ] [ target ...  ] [
       macro-name=value ...  ]

DESCRIPTION
       make executes a list of shell commands  associated  with  each  target,
       typically  to  create or update a file of the same name.  makefile con-
       tains entries for targets that describe how to bring them  up  to  date
       with  respect  to the files and/or other targets on which each depends,
       called dependencies.

       A target is out of date when the file it describes is missing, or  when
       one  (or  more)  of its dependency files has a more recent modification
       time than that of the target file.  make recursively scans the list  of
       dependencies for each target argument (or the first target entry in the
       makefile if no target argument is supplied) to generate a list of  tar-
       gets to check.  It then checks, from the bottom up, each target against
       any files it depends on to see if it is  out  of  date.   If  so,  make
       rebuilds that target.

       To  rebuild a target, make executes the set of shell commands, called a
       rule, associated with it.  This rule may  be  listed  explicitly  in  a
       makefile  entry  for  that  target, or it may be supplied implicitly by
       make.

       If no makefile is specified on the command line, make  uses  the  first
       file it finds with a name from the following list:

              makefile,  Makefile,  s.makefile,  s.Makefile,  SCCS/s.makefile,
              SCCS/s.Makefile.

       If no target is specified on the command line, make uses the first tar-
       get  defined in makefile.  If a target has no makefile entry, or if its
       entry has no rule,  make  attempts  to  update  that  target  using  an
       implicit rule.

OPTIONS
       -f makefile
              Use  the description file makefile.  A `-' as the makefile argu-
              ment denotes the standard input.  The contents of makefile, when
              present,  override  the  builtin  rules.   When  more  than  one
              `-f makefile' argument pairs appear, make takes input from  each
              makefile  in  the order listed (just as if they were run through
              cat(1V)).

       -b     This option has no effect, but is present for compatibility rea-
              sons.

       -d     Debug  mode.   Print out detailed information on files and times
              examined.

       -e     Environment variables override assignments within makefiles.

       -i     Ignore error codes returned by invoked commands.

       -k     When a nonzero error status is returned by an  invoked  command,
              abandon  work  on  the  current  target  but continue with other
              branches that do not depend on that target.

       -n     No execution mode.  Print commands, but  do  not  execute  them.
              Even  lines beginning with an @ are printed.  However, if a com-
              mand line contains the $(MAKE) macro, that line is  always  exe-
              cuted  (see the discussion of MAKEFLAGS in Environment Variables
              and Macros).

       -p     Print out the complete  set  of  macro  definitions  and  target
              descriptions.

       -q     Question  mode.   make  returns  a  zero  or nonzero status code
              depending on whether or not the target file is up to date.

       -r     Do  not  use  the  implicit  rules  make  supplies  by  default.
              Implicit rules defined in the makefile remain in effect.

       -s     Silent mode.  Do not print command lines before executing them.

       -S     Undo the effect of the -k option.

       -t     Touch  the  target  files (bringing them up to date) rather than
              performing commands listed in their rules.

       macro-name=value
              Macro definition.  This definition overrides any definition  for
              the  specified  macro  that occurs in the makefile itself, or in
              the environment.   See  Macros  and  Environment  Variables  and
              Macros, for details.

USAGE
       Refer to and for tutorial information about make.

   Targets and Rules
       There  need  not  be an actual file named by a target, but every depen-
       dency in the dependency list must be either the name of a file, or  the
       name of another target.

       If  the target has no dependency list and no rule, or if the target has
       no entry in the makefile, make attempts to produce an entry by  select-
       ing  a  rule  from  its set of implicit rules.  If none of the implicit
       rules apply, make uses the rule specified in the .DEFAULT target (if it
       appears  in  the makefile).  Otherwise make stops and produces an error
       message.

   Makefile Target Entries
       A target entry has the following format:

              target ...  : [dependency] ...  [; command] ...
                     [command]
                     ...

       The first line contains the name of a target (or a space-separated list
       of target names), terminated with a colon (:).  This may be followed by
       a dependency, or a dependency  list  that  make  checks  in  the  order
       listed.   The  dependency  list may be terminated with a semicolon (;),
       which in turn can be followed by a Bourne  shell  command.   Subsequent
       lines  in  the  target entry begin with a TAB, and contain Bourne shell
       commands.  These commands comprise a rule for building the target,  and
       are performed when the target is updated by make.

       Shell commands may be continued across input lines by escaping the NEW-
       LINE with a backslash (\).  The continuing line must also start with  a
       TAB.

       To  rebuild  a  target, make expands any macros, strips off initial TAB
       characters and passes each resulting command line to a Bourne shell for
       execution.

       The  first  nonblank  line  that  does not begin with a TAB or # begins
       another target or macro definition.

   Makefile Special Characters
       ::     Conditional dependency branch.  When used in place  of  a  colon
              (:)  the  double-colons allow a target to be checked and updated
              with respect to more than  one  dependency  list.   The  double-
              colons  allow  the  target to have more than one branch entry in
              the makefile, each with a different dependency list and  a  dif-
              ferent  rule.   make checks each branch, in order of appearance,
              to see if the target is outdated with respect to its  dependency
              list.   If so, make updates the target according to dependencies
              and rule for that branch.

       #      Start a comment.  The comment ends at the next NEWLINE.

       $      Macro expansion.  See Macros, below, for details.

       -      Following the TAB, if the first character of a command line is a
              `-',  make  ignores  any nonzero error code it may return.  make
              normally terminates  when  a  command  returns  nonzero  status,
              unless the -i or -k options are in effect.

       @      Following  the  TAB,  if the first character is a `@', make does
              not print the command line before executing it.

              If `-' and `@' appear as the first two characters after the TAB,
              both apply.

       $$     The  dollar-sign,  escaped from macro expansion.  Can be used to
              pass variable expressions beginning with $ to the shell.

   Command Execution
       Command lines are executed one at a time, each by its own shell.  Shell
       commands,  notably  cd,  are ineffectual across an unescaped NEWLINE in
       the makefile.  A line is printed (after macro expansion) as it is  exe-
       cuted,  unless  it  starts  with a `@', there is a .SILENT entry in the
       dependency hierarchy of the current target, or make is run with the  -s
       option.   Although  the -n option specifies printing without execution,
       lines containing the macro $(MAKE) are executed regardless,  and  lines
       containing  the @ special character are printed.  The -t (touch) option
       updates the modification date of a file without  executing  any  rules.
       This can be dangerous when sources are maintained by more than one per-
       son.

       To take advantage of the Bourne shell if control structure for  branch-
       ing, use a command line of the form:
              if
              expression; \
              then
              command; \
              command; \
              ...
              elif
              expression; \
              ...
              else
              command; \
              fi
       Although  composed  of several input lines, the escaped NEWLINE charac-
       ters insure that make treats them all as one  command  line.   To  take
       advantage of the Bourne shell for control statement, use a command line
       of the form:
              for var in list ; do \
              command ; \
              ...
              done
       To write shell variables, use double dollar-signs ($$).   This  escapes
       expansion of the dollar-sign by make.

   Signals
       INT  and  QUIT  signals received from the keyboard halt make and remove
       the target file being processed (unless it is in  the  dependency  list
       for .PRECIOUS).

   Special-Function Targets
       When  incorporated  in  a  makefile, the following target names perform
       special functions.

       .DEFAULT    If this target is defined in the makefile, its rule is used
                   when  there  is no entry in the makefile for a given target
                   and none of the implicit rules applies.  make  ignores  the
                   dependency list for this target.

       .PRECIOUS   List  of files not to delete.  Files listed as dependencies
                   for this target are not  removed  if  make  is  interrupted
                   while rebuilding them.

       .SILENT     Run  silently.   When  this target appears in the makefile,
                   make does not echo commands before executing them.

       .IGNORE     Ignore errors.  When this target appears in  the  makefile,
                   make ignores nonzero error codes returned from commands.

       .SUFFIXES   The   suffixes  list  for  selecting  implicit  rules  (see
                   Implicit Rules).

   Include Files
       make has an include file capability.  If the word  include  appears  as
       the first seven letters of a line, and is followed by a SPACE or a TAB,
       the string that follows is taken as a filename.  The text of the  named
       file is read in at the current location in the makefile.  include files
       can be nested to a depth of no more than about 16.

   Macros
       Entries of the form

              macro-name=value

       define macros.  name is the name of the macro, and  value,  which  con-
       sists of all characters up to a comment character or unescaped NEWLINE,
       is the value.  Words in a macro value are delimited by SPACE, TAB,  and
       escaped NEWLINE characters, and the terminating NEWLINE.

       Subsequent  references  to  the macro, of the forms: $(name) or ${name}
       are replaced by value.  The parentheses or brackets can be omitted in a
       reference to a macro with a single-character name.

       Macros  definitions  can  contain  references  to other macros, but the
       nested references  aren't  expanded  immediately.   Instead,  they  are
       expanded along with references to the macro itself.

       Substitutions within macros can be made as follows:

              $(name:str1=str2)

       where  str1  is  either a suffix, or a word to be replaced in the macro
       definition, and str2 is the replacement suffix or word.

   Dynamically Maintained Macros
       There are several dynamically maintained  macros  that  are  useful  as
       abbreviations within rules.

       $*     The  basename  of  the  current target.  It is assigned only for
              implicit rules.

       $<&lt;     The name of the file on which the target is assumed  to  depend.
              This  macro  is  only assigned for implicit rules, or within the
              .DEFAULT target's rule.

       $@     The name of the current target.  It is assigned only  for  rules
              in targets that are explicitly defined in the makefile.

       $?     The list of dependencies with respect to which the target is out
              of date.  This macro is assigned only for explicit rules.

       $%     The library member. The $% macro is only evaluated when the tar-
              get  is an archive library member of the form: lib(file.o ).  In
              this case, $@ evaluates to lib and $% evaluates to  the  library
              member, file.o.

       All  of  these  macros  but  $?  can be modified to apply either to the
       filename part, or the directory part of the strings they stand for,  by
       adding  an upper case F or D, respectively (and enclosing the resulting
       name in parentheses or braces).  Thus, `$(@D)' refers to the  directory
       part of the string `$@'.  If there is no directory part, `.'  is gener-
       ated.

   Environment Variables and Macros
       After reading in its implicit rules, make reads in variables  from  the
       environment,  treating  them  as  if they were macro definitions.  Only
       then does make read in a makefile.  Thus, macro  assignments  within  a
       makefile override environment variables, provided that the -e option is
       not in effect.  In turn, make exports  environment  variables  to  each
       shell  it  invokes.   Macros  not  read in from the environment are not
       exported.

       The MAKEFLAGS macro is a special case.  When present as an  environment
       variable, make takes its options (except for -f, -p, and -d) from MAKE-
       FLAGS in combination with any flags entered on the command line.   make
       retains  this combined value, exports it automatically to each shell it
       forks, and reads its value to obtain options for any make  commands  it
       invokes.   Note,  however  that flags passed with MAKEFLAGS even though
       they are in effect, are not shown in the output produced by make.

       The MAKE macro is another special case.   It  has  the  value  make  by
       default, and temporarily overrides the -n option for any line that con-
       tains a reference to it.  This allows nested invocations of make  writ-
       ten as:

              $(MAKE) ...

       to  run recursively, so that the command make -n can be used to test an
       entire hierarchy of makefiles.

       For compatibility with the 4.2 BSD make, the MFLAGS macro is  set  from
       the  MAKEFLAGS  variable  by  prepending a `-'.  MFLAGS is not exported
       automatically.

       make supplies the following macros for compilers and their options:

       lBp-1 l  lBp-1  l  .   CC   C  compiler,  cc(1V)  CFLAGS    C  compiler
       options  FC   FORTRAN  77  compiler, f77(1)   FFLAGS    FORTRAN 77 com-
       piler options            RFLAGS    FORTRAN  77  compiler  options  with
                      Ratfor   (.r)   source   files   PC   Pascal   compiler,
       pc(1)   PFLAGS    Pascal  compiler   options   M2C  Modula-2   compiler
         M2FLAGS     Modula-2   compiler   options   GET  sccs(1)   get   com-
       mand GFLAGS    sccs get options AS   the  assembler,  as(1)     ASFLAGS
         assembler  options  LD   the linker, ld(1)   LDFLAGS   linker options
       LEX           lex(1)         LFLAGS         lex      options       YACC
            yacc(1)   YFLAGS    yacc  options Unless these macros are  read in
       as environment variables, their values are not exported  by  make.   If
       you  run  make with any these set in the environment, it is a good idea
       to add commentary to the makefile to indicate what  value  each  takes.
       If -r is in effect, make ignores these macro definitions.

       When  set  to a single-word value such as /usr/bin/csh, the SHELL macro
       indicates the name of an alternate shell to use for invoking  commands.
       Note:  to  improve  normal performance make executes command lines that
       contain no shell metacharacters directly.   Such  builtin  commands  as
       dirs,  or set in the C shell are not recognized unless the command line
       includes a metacharacter (for instance, a semicolon).

   Implicit Rules
       make supplies implicit rules for certain types of targets that have  no
       explicit  rule  defined  in  the makefile.  For these types of targets,
       make attempts to select an implicit rule by looking for an  association
       between  the  target  and a file in the directory that shares its base-
       name.  That file, if found, is presumed to be a dependency  file.   The
       implicit  rule  is selected according to the target's suffix (which may
       be null), and that of the dependency file.  If there is no such  depen-
       dency  file,  if  the  suffix of either dependency or target is not the
       suffixes list, or if there is no implicit rule defined for that pair of
       suffixes,  no rule is selected.  make either uses the default rule that
       you have supplied (if any), or stops.

       The suffixes list is a target with each known suffix listed as a depen-
       dency, by default:

              .SUFFIXES:  .o   .c  .c~  .mod  .mod~  .sym  .def  .def~  .p .p~
                     .f  .f~  .r  .r~  .y  .y~  .l  .l~
                     .s .s~ .sh .sh~ .h .h~
       Multiple suffix-list targets accumulate; a  .SUFFIXES  target  with  no
       dependencies  clears  the list of suffixes.  Order is significant; make
       selects a rule that corresponds to the target's suffix  and  the  first
       dependency-file suffix found in the list.

       A  tilde  (~)  refers  to  the  s.prefix  of  an SCCS history file (see
       sccs(1)).  If make cannot locate a history file (with  a  name  of  the
       form s.basename.suffix) in the current working directory, it checks for
       one in the SCCS subdirectory (if that directory exists)  for  one  from
       which to sccs-get(1) the dependency file.

       An implicit rule is a target of the form:

              dt:
                   rule

       where t is the suffix of the target, d is the suffix of the dependency,
       and rule is the implicit rule for building such a target  from  such  a
       dependency.   Both d and t must appear in the suffixes list for make to
       recognize the target as one that defines an implicit rule.

       An implicit rule with only one suffix describes how to build  a  target
       having  a  null  (or no) suffix, from a dependency having the indicated
       suffix.  For instance, the .c rule describes  how  to  build  the  exe-
       cutable file from a C source file, file.c.

       Implicit  rules  are  supplied  for  the  following suffixes and suffix
       pairs:

              .c  .c~  .p  .p~  .mod  .mod~  .f  .f~  .F   .F~   .r   .r~  .sh
              .sh~  .c.o   .c~.o   .c~.c   .p.o  .p~.o  .p~.p  .mod.o  .mod~.o
              .mod~.mod  .def.sym   .def~.sym   .def~.def  .f.o   .f~.f   .F.o
              .F~.o  .F~.F  .r.o  .r~.o  .r~.r  .s.o  .s~.o .s~.s .sh~.sh .y.o
              .y~.o  .l.o  .l~.o .y.c  .y~.c  .y~.y  .l.c  .l~.c  .l~.l   .c.a
              .c~.a .s~.a  .h~.h

       These  rules  can be changed within a makefile, and additional implicit
       rules can be added.  To print out make's internal rules, use  the  fol-
       lowing command.  Note: this command only works with the Bourne Shell:

              $  make -fp - 2>&gt;/dev/null <&lt;/dev/null

       If  you  are  using  the  C shell, use this command to print out make's
       internal rules:

              example%  (make -fp - <&lt;/dev/null >&gt;/dev/tty) >&gt;&&amp;/dev/null

   Library Maintenance
       If a target name contains parentheses, as with:

              lib.a(member)

       it is assumed to be the name  of  an  archive  (ar(1V))  library.   The
       string  within  the parentheses refers to a member of the library.  (If
       the string contains more than one word, the only first word  is  used.)
       A  member of an archive can be explicitly made to depend on a file with
       a matching filename.  For instance, given a directory that contains the
       files mem1.c and mem2.c, along with a makefile with the entries:

              lib.a: lib.a(mem1.o) lib.a(mem2.0)

              lib.a(mem1.o): mem1.o
                     ar rv lib.a mem1.o

              lib.a(mem2.o): mem2.o
                     ar rv lib.a mem2.o

       make,  when  run,  compiles  the  .c files into relocatable object (.o)
       files using the .c.o implicit rule.  It then loads the freshly compiled
       version  of  each file into the library according to the explicit rules
       in the lib.a()targets.

       Implicit rules pertaining to archive  libraries  have  the  form  .XX.a
       where the XX is the suffix from which the archive member is to be made.
       An unfortunate byproduct of the current implementation requires that XX
       to  be  different  from  the  suffix of the archive member itself.  For
       instance, the target lib(file.o) cannot depend upon the file.o  explic-
       itly,  but  instead,  must  be made to depend on a source file, such as
       file.c.  For this reason it is recommended that you define an  explicit
       target  in  the  makefile for each library member to maintain, as shown
       above.

       A target name of the form

              library((entry-point))

       refers to the member of a randomized  object  library  (see  ranlib(1))
       that defines the symbol entry-point.

EXAMPLES
       This  makefile says that pgm depends on two files a.o and b.o, and that
       they in turn depend on their corresponding source files (a.c  and  b.c)
       along with a common file incl.h:

              pgm: a.o b.o
                     cc a.o b.o -o $@

              a.o: incl.h a.c
                     cc -c a.c

              b.o: incl.h b.c
                     cc -c b.c

       The  following makefile uses the builtin inference rules to express the
       same dependencies:

              pgm: a.o b.o
                     cc a.o b.o -o pgm

              a.o b.o: incl.h

FILES
       [Mm]akefile
       s.[Mm]akefile
       SCCS/s.[mM]akefile

DIAGNOSTICS
       Don't know how to make target. Stop.
              There is no makefile  entry  for  target,  and  none  of  make's
              implicit  rules apply (there is no dependency file with a suffix
              in the suffixes list, or the  target's  suffix  is  not  in  the
              list).

       *** target removed.
              make  was  interrupted  in the middle of trying to build target.
              Rather than leaving a partially-completed version that is  newer
              than  its  dependencies,  make  removes the file associated with
              target.

       *** Error code n.
              The previous shell command returned a nonzero  error  code.   In
              this  case  make stops, unless either the -k or the -i option is
              set, the target .IGNORE appears, or the command is prefixed with
              a `-' in the makefile.

       *** signal message
              The  previous  shell command was aborted due to a signal.  If `-
              core dumped' appears after the message, a core file was created.

SEE ALSO
       ar(1V), cat(1V), cc(1V), cd(1),  csh(1),  lex(1),  ranlib(1),  sccs(1),
       sccs-get(1), sh(1)

BUGS
       Some commands return nonzero status inappropriately; use -i to overcome
       the difficulty.

       Filenames with the characters =, :, and @ will not work.

       You cannot build lib(file.o) from file.o.

       The macro substitution $(a:.o=.c~) does not work.

       Options supplied by MAKEFLAGS should appear in output from make.



                               16 November 1987                    OLD-MAKE(1)