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makedepend(1X)						       makedepend(1X)
X11R6									X11R6


  makedepend - create dependencies in makefiles


  makedepend [-Dname=def] [-Dname] [-Iincludedir] [-Yincludedir] [-a]
  [-fmakefile] [-oobjsuffix] [-pobjprefix] [-sstring] [-wwidth]	[-v] [-m] [--
  otheroptions --] sourcefile ...


  Makedepend will ignore any option that it does not understand	so that	you
  may use the same arguments that you would for	cc(1).

  -Dname=def or	-Dname
	  Define. This places a	definition for name in makedepend's symbol
	  table. Without =def the symbol becomes defined as "1".

	  Include directory. This option tells makedepend to prepend inclu-
	  dedir	to its list of directories to search when it encounters	a
	  #include directive. By default, makedepend only searches the stan-
	  dard include directories (usually /usr/include and possibly a
	  compiler-dependent directory).

	  Replace all of the standard include directories with the single
	  specified include directory; you can omit the	includedir to simply
	  prevent searching the	standard include directories.

  -a	  Append the dependencies to the end of	the file instead of replacing

	  Filename. This allows	you to specify an alternate makefile in	which
	  makedepend can place its output.

	  Object file suffix. Some systems may have object files whose suffix
	  is something other than ".o".	This option allows you to specify
	  another suffix, such as ".b" with -o.b or ":obj" with	-o:obj and so

	  Object file prefix. The prefix is prepended to the name of the
	  object file. This is usually used to designate a different direc-
	  tory for the object file. The	default	is the empty string.

	  Starting string delimiter. This option permits you to	specify	a
	  different string for makedepend to look for in the makefile.

  -wwidth Line width. Normally,	makedepend will	ensure that every output line
	  that it writes will be no wider than 78 characters for the sake of
	  readability. This option enables you to change this width.

  -v	  Verbose operation. This option causes	makedepend to emit the list
	  of files included by each input file on standard output.

  -m	  Warn about multiple inclusion. This option causes makedepend to
	  produce a warning if any input file includes another file more than
	  once.	 In previous versions of makedepend this was the default
	  behavior; the	default	has been changed to better match the behavior
	  of the C compiler, which does	not consider multiple inclusion	to be
	  an error.  This option is provided for backward compatibility, and
	  to aid in debugging problems related to multiple inclusion.

  "-- options --"
	  If makedepend	encounters a double hyphen (--)	in the argument	list,
	  then any unrecognized	argument following it will be silently
	  ignored; a second double hyphen terminates this special treatment.
	  In this way, makedepend can be made to safely	ignore esoteric	com-
	  piler	arguments that might normally be found in a CFLAGS make	macro
	  (see the EXAMPLE section below). All options that makedepend recog-
	  nizes	and appear between the pair of double hyphens are processed


  makedepend reads each	sourcefile in sequence and parses it like a C-
  preprocessor,	processing all #include, #define, #undef, #ifdef, #ifndef,
  #endif, #if and #else	directives so that it can correctly tell which
  #include, directives would be	used in	a compilation.	Any #include, direc-
  tives	can reference files having other #include directives, and parsing
  will occur in	these files as well.

  Every	file that a sourcefile includes, directly or indirectly, is what mak-
  edepend calls	a "dependency".	 These dependencies are	then written to	a
  makefile in such a way that make(1) will know	which object files must	be
  recompiled when a dependency has changed.

  By default, makedepend places	its output in the file named makefile if it
  exists, otherwise Makefile. An alternate makefile may	be specified with the
  -f option. It	first searches the makefile for	the line

       # DO NOT	DELETE THIS LINE -- make depend	depends	on it.

  or one provided with the -s option, as a delimiter for the dependency	out-
  put. If it finds it, it will delete everything following this	to the end of
  the makefile and put the output after	this line. If it doesn't find it, the
  program will append the string to the	end of the makefile and	place the
  output following that. For each sourcefile appearing on the command line,
  makedepend puts lines	in the makefile	of the form

	     sourcefile.o: dfile ...

  Where	"sourcefile.o" is the name from	the command line with its suffix
  replaced with	".o", and "dfile" is a dependency discovered in	a #include
  directive while parsing sourcefile or	one of the files it included.


  Normally, makedepend will be used in a makefile target so that typing	"make
  depend" will bring the dependencies up to date for the makefile. For exam-

	    SRCS = file1.c file2.c ...
	    CFLAGS = -O	-DHACK -I../foobar -xyz
		makedepend -- $(CFLAGS)	-- $(SRCS)


  The approach used in this program enables it to run an order of magnitude
  faster than any other	"dependency generator" I have ever seen. Central to
  this performance are two assumptions:	that all files compiled	by a single
  makefile will	be compiled with roughly the same -I and -D options; and that
  most files in	a single directory will	include	largely	the same files.

  Given	these assumptions, makedepend expects to be called once	for each
  makefile, with all source files that are maintained by the makefile appear-
  ing on the command line. It parses each source and include file exactly
  once,	maintaining an internal	symbol table for each. Thus, the first file
  on the command line will take	an amount of time proportional to the amount
  of time that a normal	C preprocessor takes. But on subsequent	files, if it
  encounter's an include file that it has already parsed, it does not parse
  it again.

  For example, imagine you are compiling two files, file1.c and	file2.c, they
  each include the header file <&lt;header.h>&gt;, and the file	<&lt;header.h>&gt; in turn
  includes the files <&lt;def1.h>&gt; and <&lt;def2.h>&gt;. When you run the command

       makedepend file1.c file2.c

  makedepend will parse	file1.c	and consequently, <&lt;header.h>&gt; and then
  <&lt;def1.h>&gt; and <&lt;def2.h>&gt;. It then decides that the dependencies for this	file

       file1.o:	header.h def1.h	def2.h

  But when the program parses file2.c and discovers that it, too, includes
  <&lt;header.h>&gt;, it does not parse	the file, but simply adds <&lt;header.h>&gt;,
  <&lt;def1.h>&gt; and <&lt;def2.h>&gt;	to the list of dependencies for	file2.o.


  makedepend parses, but does not currently evaluate, the SVR4
  #predicate(token-list) preprocessor expression; such expressions are simply
  assumed to be	true. This may cause the wrong #include	directives to be

  Imagine you are parsing two files, say file1.c and file2.c, each includes
  the file <&lt;def.h>&gt;. The	list of	files that <&lt;def.h>&gt; includes might truly	be
  different when <&lt;def.h>&gt; is included by	file1.c	than when it is	included by
  file2.c. But once makedepend arrives at a list of dependencies for a file,
  it is	cast in	concrete.


  cc(1), make(1)


  Todd Brunhoff, Tektronix, Inc., and MIT Project Athena