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MAKE(1)                     General Commands Manual                    MAKE(1)

       make - maintain, update, and regenerate related programs and files

       make [ -f makefile ] ...  [ -d ] [ -dd ] [ -D ] [ -DD ]
            [ -e ] [ -i ] [ -k ] [ -n ] [ -p ] [ -P ] [ -q ] [ -r ]
            [ -s ] [ -S ] [ -t ] [ target ...  ]
            [ macro=value ...  ]

       make  executes  a  list  of shell commands associated with each target,
       typically to create or update a file of the same name.   makefile  con-
       tains  entries  that  describe  how  to  bring a target up to date with
       respect to those on which it depends, which  are  called  dependencies.
       Since each dependency is a target, it may have dependencies of its own.
       Targets, dependencies, and sub-dependencies comprise a  tree  structure
       that make traces when deciding whether or not to rebuild a target.

       make recursively checks each target against its dependencies, beginning
       with the first target entry in makefile if no target argument  is  sup-
       plied  on  the command line.  If, after processing all of its dependen-
       cies, a target file is found either to be missing, or to be older  than
       any  of  its dependencies, make rebuilds it.  Optionally with this ver-
       sion of make, a target can be treated as out-of-date when the  commands
       used  to  generate  it  have changed since the last time the target was

       To build a given target, make executes the list of commands,  called  a
       rule.   This  rule  may  be  listed explicitly in the target's makefile
       entry, or it may be supplied implicitly by make.

       When no makefile is specified with a -f option:

              o  If there is a file named makefile in the  working  directory,
                 make  uses  that file.  If, however, there is an SCCS history
                 file (SCCS/s.makefile)  which  is  newer,  make  attempts  to
                 retrieve and use the most recent version.

              o  In the absence of the above file(s), if a file named Makefile
                 is present in the working directory, make attempts to use it.
                 If  there  is  an SCCS history file (SCCS/s.Makefile) that is
                 newer, make attempts to retrieve and use the most recent ver-

       If no target is specified on the command line, make uses the first tar-
       get defined in makefile.

       If a target has no makefile entry, or if its entry has  no  rule,  make
       attempts  to  derive  a rule by each of the following methods, in turn,
       until a suitable rule is found.  (Each method is described under  USAGE

              o  Pattern matching rules.

              o  Implicit rules, read in from a user-supplied makefile.

              o  Standard  implicit  rules (also known as suffix rules), typi-
                 cally read in from the file <&lt;make/default.mk>&gt;.

              o  SCCS retrieval.  make retrieves the most recent version  from
                 the  SCCS  history file (if any).  See the description of the
                 .SCCS_GET: special-function target for details.

              o  The rule from the .DEFAULT: target entry, if there is such an
                 entry in the makefile.

       If  there  is no makefile entry for a target, if no rule can be derived
       for building it, and if no file by that name is present, make issues an
       error message and halts.

       -f makefile
              Use  the description file makefile.  A `-' as the makefile argu-
              ment denotes the standard input.  The contents of makefile, when
              present,  override the standard set of implicit rules and prede-
              fined macros.  When more than one `-f  makefile'  argument  pair
              appears, make uses the concatenation of those files, in order of

       -d     Display the reasons why make chooses to rebuild a  target;  make
              displays  any and all dependencies that are newer.  In addition,
              make displays options read in  from  the  MAKEFLAGS  environment

       -dd    Display the dependency check and processing in vast detail.

       -D     Display the text of the makefiles read in.

       -DD    Display  the  text  of the makefiles, default.mk file, the state
              file, and all hidden-dependency reports.

       -e     Environment variables override assignments within makefiles.

       -i     Ignore error codes returned by commands.  Equivalent to the spe-
              cial-function target `.IGNORE:'.

       -k     When  a nonzero error status is returned by a rule, or when make
              cannot find a rule, abandon work on the current target, but con-
              tinue with other dependency branches that do not depend on it.

       -n     No  execution  mode.   Print  commands, but do not execute them.
              Even lines beginning with an @ are printed.  However, if a  com-
              mand  line  contains a reference to the $(MAKE) macro, that line
              is always executed (see the discussion of MAKEFLAGS  in  Reading
              Makefiles and the Environment).

       -p     Print  out  the  complete  set  of  macro definitions and target

       -P     Merely report dependencies, rather than building them.

       -q     Question mode.  make returns  a  zero  or  nonzero  status  code
              depending on whether or not the target file is up to date.

       -r     Do not read in the default makefile <&lt;make/default.mk>&gt;.

       -s     Silent  mode.  Do not print command lines before executing them.
              Equivalent to the special-function target `.SILENT:'.

       -S     Undo the effect of the -k option.  Stop processing when  a  non-
              zero exit status is returned by a command.

       -t     Touch  the  target  files (bringing them up to date) rather than
              performing their rules.  This can be dangerous  when  files  are
              maintained  by more than one person.  When the .KEEP_STATE: tar-
              get appears in the makefile, this option updates the state  file
              just as if the rules had been performed.

              Macro definition.  This definition overrides any regular defini-
              tion for the specified macro within the makefile itself,  or  in
              the environment.  However, this definition can still be overrid-
              den by conditional macro assignments.

       Refer to and make in for tutorial information about make.

   Reading Makefiles and the Environment
       When make first starts, it reads the MAKEFLAGS environment variable  to
       obtain  any  the  following options specified present in its value: -d,
       -D, -e, -i, -k, -l, -n, -p, -q, -r, -s, -S, or -t.  (Within  the  MAKE-
       FLAGS  value, the leading `--' character for the option string is omit-
       ted.)  make then reads the command line for additional  options,  which
       also take effect.

       Next,  make  reads in a default makefile that typically contains prede-
       fined macro definitions, target entries for implicit rules,  and  addi-
       tional  rules, such as the rule for retrieving SCCS files.  If present,
       make uses the file default.mk in the current  directory;  otherwise  it
       reads  the  file <&lt;make/default.mk>&gt;, which contains the standard defini-
       tions and rules.
       Use the directive:

              include <&lt;make/default.mk>&gt;

       in your local default.mk file to include them.

       Next, make imports variables from the environment (unless the -e option
       is  in  effect),  and treats them as defined macros.  Because make uses
       the most recent definition it encounters, a  macro  definition  in  the
       makefile  normally  overrides an environment variable of the same name.
       When -e is in effect, however, environment variables are read in  after
       all  makefiles have been read.  In that case, the environment variables
       take precedence over definitions in the makefile.

       Next, make reads the state file, .make.state in the local directory  if
       it  exists, and then any makefiles you specify with -f, or one of make-
       file or Makefile as described above.

       Next, (after reading the environment if -e is in effect), make reads in
       any  macro definitions supplied as command line arguments.  These over-
       ride macro definitions in the makefile and the  environment  both,  but
       only for the make command itself.

       make  exports  environment  variables,  using the most recently defined
       value.  Macro definitions supplied on the command line are not normally
       exported, unless the macro is also an environment variable.

       make does not export macros defined in the makefile.  If an environment
       variable is set, and a macro with the same name is defined on the  com-
       mand  line,  make  exports  its  value  as defined on the command line.
       Unless -e is in effect, macro  definitions  within  the  makefile  take
       precedence over those imported from the environment.

       HOST_MACH, and TARGET_MACH  are  special  cases.   See  Special-Purpose
       Macros below, for details.

   Makefile Target Entries
       A target entry has the following format:

              target...  [:|::] [dependency] ...  [; command] ...

       The first line contains the name of a target, or a space-separated list
       of target names, terminated with a colon or double colon.  If a list of
       targets  is given, this is equivalent to having a separate entry of the
       same form for each target.  The colon(s) may be followed  by  a  depen-
       dency, or a dependency list.  make checks this list before building the
       target.  The dependency list may be terminated with  a  semicolon  (;),
       which in turn can be followed by a single Bourne shell command.  Subse-
       quent lines in the target entry begin with a TAB,  and  contain  Bourne
       shell commands.  These commands comprise the rule for building the tar-

       Shell commands may be continued across input lines by escaping the NEW-
       LINE  with a backslash (\).  The continuing line must also start with a

       To rebuild a target, make expands macros, strips off initial TAB  char-
       acters  and  either  executes  the  command directly (if it contains no
       shell metacharacters), or passes each command line to  a  Bourne  shell
       for execution.

       The  first line that does not begin with a TAB or # begins another tar-
       get or macro definition.

   Makefile Special Characters
       #      Start a comment.  The comment ends at the next NEWLINE.  If  the
              #  follows the TAB in a command line, that line is passed to the
              shell (which also treats # as the start of a comment).

       include filename
              If the word include appears as the first seven letters of a line
              and  is  followed  by a SPACE or TAB, the string that follows is
              taken as a filename to interpolate at that line.  include  files
              can  be nested to a depth of no more than about 16.  If filename
              is a macro reference, it is expanded.

   Targets and Dependencies
       :      Target list terminator.  Words following the colon are added  to
              the  dependency  list for the target or targets.  If a target is
              named in more than one colon-terminated target entry, the depen-
              dencies for all its entries are added to form that target's com-
              plete dependency list.

       ::     Target terminator for  alternate  dependencies.   When  used  in
              place  of  a  `:' the double-colon allows a target to be checked
              and updated with respect to alternate  dependency  lists.   When
              the target is out-of-date with respect to dependencies listed in
              the first alternate, it is built according to the rule for  that
              entry.  When out-of-date with respect to dependencies in another
              alternate, it is built according the rule in that  other  entry.
              Implicit  rules  do  not apply to double-colon targets; you must
              supply a rule for each entry.  If no dependencies are specified,
              the rule is always performed.

       target [+ target...] :
              Target group.  The rule in the target entry builds all the indi-
              cated targets as a group.  It is normally  performed  only  once
              per make run, but is checked for command dependencies every time
              a target in the group is encountered in the dependency scan.

       %      Pattern matching wild card metacharacter.  Like  the  `*'  shell
              wild  card, `%' matches any string of zero or more characters in
              a target name or dependency, in the target portion of  a  condi-
              tional  macro  definition, or within a pattern replacement macro
              reference.  Note: only one `%' can appear in  a  target,  depen-
              dency-name, or pattern-replacement macro reference.

              make ignores the leading `./' characters from targets with names
              given as pathnames relative to "dot," the working directory.

       =      Macro definition.  The word to the left of this character is the
              macro  name; words to the right comprise its value.  Leading and
              trailing white space characters are stripped from the value.   A
              word break following the = is implied.

       $      Macro  reference.  The following character, or the parenthesized
              or bracketed string, is interpreted as a macro  reference:  make
              expands the reference (including the $) by replacing it with the
              macro's value.

       ( )
       { }    Macro-reference name delimiters.  A parenthesized  or  bracketed
              word  appended  to  a  $ is taken as the name of the macro being
              referred to.  Without the delimiters, make recognizes  only  the
              first character as the macro name.

       $$     A  reference to the dollar-sign macro, the value of which is the
              character `$'.  Used to pass variable expressions beginning with
              $  to  the  shell,  to  refer to environment variables which are
              expanded by the shell, or to delay processing of dynamic  macros
              within  the  dependency  list  of a target, until that target is
              actually processed.

       \$     Escaped dollar-sign character.  Interpreted as a literal  dollar
              sign within a rule.

       +=     When  used  in place of `=', appends a string to a macro defini-
              tion (must be surrounded by white space, unlike `=').

       :=     Conditional macro assignment.  When preceded by a list  of  tar-
              gets  with  explicit  target  entries, the macro definition that
              follows takes effect when processing  only  those  targets,  and
              their dependencies.

       :sh =  Define  the  value of a macro to be the output of a command (see
              Command Substitutions, below).

       :sh    In a macro reference, execute the command stored in  the  macro,
              and  replace  the reference with the output of that command (see
              Command Substitutions).

       -      make ignores any nonzero error code returned by a  command  line
              for  which the first non-TAB character is a `-'.  This character
              is not passed to the shell as part of the  command  line.   make
              normally  terminates  when  a  command  returns  nonzero status,
              unless the -i or -k options, or  the  .IGNORE:  special-function
              target is in effect.

       @      If  the  first non-TAB character is a @, make does not print the
              command line before executing it.  This character is not  passed
              to the shell.

       ?      Escape command-dependency checking.  Command lines starting with
              this character are not subject to command dependency checking.

       !      Force command-dependency checking.  Command-dependency  checking
              is applied to command lines for which it would otherwise be sup-
              pressed.  This checking is normally suppressed  for  lines  that
              contain  references  to  the  `?'   dynamic  macro (for example,

       When any combination of `-', `@', `?', or  `!'   appear  as  the  first
       characters  after the TAB, all that are present apply.  None are passed
       to the shell.

   Special-Function Targets
       When incorporated in a makefile, the  following  target  names  perform

              If  it has an entry in the makefile, the rule for this target is
              used to process a target when there is no other entry for it, no
              rule  for  building  it,  and no SCCS history file from which to
              retrieve a current version.  make ignores any  dependencies  for
              this target.

       .DONE: If  defined  in the makefile, make processes this target and its
              dependencies after all other targets are built.  This target  is
              also performed when make halts with an error, unless the .FAILED
              target is defined.

              This target, along with its dependencies, is  performed  instead
              of  .DONE  when  defined  in the makefile and make halts with an

              Ignore errors.  When this target appears in the  makefile,  make
              ignores non-zero error codes returned from commands.

       .INIT: If defined in the makefile, this target and its dependencies are
              built before any other targets are processed.

              If this target appears in the makefile, make updates  the  state
              file,  .make.state,  in the current directory.  This target also
              activates command dependencies, and hidden dependency checks.

              A target-entry of the form:

                     .MAKE_VERSION:  VERSION-number

              enables version checking.  If the version of make  differs  from
              the version indicated, make issues a warning message.

              Currently,  this  target has no effect, it is, however, reserved
              for future use.

              Currently of no effect, but reserved for future use.

              List of files not to delete.  make does not remove  any  of  the
              files  listed  as dependencies for this target when interrupted.
              make normally removes the current target  when  it  receives  an

              This target contains the rule for retrieving the current version
              of an SCCS file from its history file.   To  suppress  automatic
              retrieval,  add  an  entry for this target with an empty rule to
              your makefile.

              Run silently.  When this target appears in  the  makefile,  make
              does not echo commands before executing them.

              The suffixes list for selecting implicit rules (see The Suffixes

       .WAIT: Currently of no effect, but reserved for future use.

   Clearing Special Targets
       In this version of make, you can clear the definition of the  following
       special  targets by supplying entries for them with no dependencies and
       no rule:

              .DEFAULT,  .SCCS_GET,  and .SUFFIXES

   Command Dependencies
       When the .KEEP_STATE: target appears in the makefile, make  checks  the
       command  for building a target against the state file, .make.state.  If
       the command has changed since the last make run, make rebuilds the tar-

   Hidden Dependencies
       When  the  .KEEP_STATE:  target  appears  in  the  makefile, make reads
       reports from cpp(1) and other compilation processors for  any  "hidden"
       files,  such  as  #include  files.   If  the target is out of date with
       respect to any of these files, make rebuilds it.

       Entries of the form


       define macros.  macro is the name of the macro, and value,  which  con-
       sists of all characters up to a comment character or unescaped NEWLINE,
       is the value.  make strips both leading and  trailing  white  space  in
       accepting the value.

       Subsequent  references  to  the macro, of the forms: $(name) or ${name}
       are replaced by value.  The parentheses or brackets can be omitted in a
       reference to a macro with a single-character name.

       Macro  references can contain references to other macros, in which case
       nested references are expanded first.

   Suffix Replacement Macro References
       Substitutions within macros can be made as follows:


       where string1 is either a suffix, or a word to be replaced in the macro
       definition,  and string2 is the replacement suffix or word.  Words in a
       macro value are separated by SPACE, TAB, and  escaped  NEWLINE  charac-

   Pattern Replacement Macro References
       Pattern  matching  replacements  can  also be applied to macros, with a
       reference of the form:
              $(name: op%os= np%ns)

       where op is the existing (old) prefix and os is the existing (old) suf-
       fix, np and ns are the new prefix and new suffix, respectively, and the
       pattern matched by % (a string of zero or more characters), is  carried
       forward from the value being replaced.  For example:
              DEBUG= $(PROGRAM:%=tmp/%-g)

       sets the value of DEBUG to tmp/fabricate-g.

       Note: pattern replacement macro references cannot be used in the depen-
       dency list of a pattern matching rule; the % characters are not  evalu-
       ated  independently.   Also,  any number of % metacharacters can appear
       after the equal-sign.

   Appending to a Macro
       Words can be appended to macro values as follows:

              macro += word ...

   Special-Purpose Macros
       When the MAKEFLAGS variable is present in the environment,  make  takes
       options  from  it,  in  combination with options entered on the command
       line.  make retains this combined value as  the  MAKEFLAGS  macro,  and
       exports it automatically to each command or shell it invokes.

       Note:  flags passed by way of MAKEFLAGS are only displayed when the -d,
       or -dd options are in effect.

       The MAKE macro is another special case.   It  has  the  value  make  by
       default,  and temporarily overrides the -n option for any line in which
       it is referred to.  This allows nested invocations of make written as:

              $(MAKE) ...

       to run recursively, with the -n flag in effect  for  all  commands  but
       make.  This lets you use `make -n' to test an entire hierarchy of make-

       For compatibility with the 4.2 BSD make, the MFLAGS macro is  set  from
       the  MAKEFLAGS  variable  by  prepending a `-'.  MFLAGS is not exported

       The SHELL macro, when set to a single-word value such as  /usr/bin/csh,
       indicates  the  name  of  an  alternate  shell  to use.  The default is
       /bin/sh.  Note: make executes commands that contain no shell  metachar-
       acters itself.  Built-in commands, such as dirs in the C shell, are not
       recognized unless  the  command  line  includes  a  metacharacter  (for
       instance,  a  semicolon).   This  macro  is  neither imported from, nor
       exported to the environment, regardless of -e.  To be sure  it  is  set
       properly,  you  must  define  this  macro  within  every  makefile that
       requires it.

       The  KEEP_STATE  environment  variable  has  the  same  effect  as  the
       .KEEP_STATE: special-function target.  It enables command dependencies,
       hidden dependencies and writing of the state file.

       The following macros are provided for use with cross-compilation:

              The machine architecture of the host system.  By  default,  this
              is the output of the arch(1) command prepended with `--'.  Under
              normal circumstances, this value should never be altered by  the

              The  machine architecture of the target system.  By default, the
              output of arch, prepended with `--'.

              The machine architecture of the host system.  By  default,  this
              is the output of the mach(1), prepended with `--'.  Under normal
              circumstances, this value should never be altered by the user.

              The machine architecture of the target system.  By default,  the
              output of mach, prepended with `--'.

   Dynamic Macros
       There  are  several  dynamically  maintained  macros that are useful as
       abbreviations within rules.  They are shown here as references; if  you
       were to define them, make would simply override the definition.

       $*     The  basename  of the current target, derived as if selected for
              use with an implicit rule.

       $<&lt;     The name of a dependency file, derived as if  selected  for  use
              with an implicit rule.

       $@     The  name of the current target.  This is the only dynamic macro
              whose value is strictly determined when  used  in  a  dependency
              list. (In which case it takes the form `$$@'.)

       $?     The  list  of dependencies that are newer than the target.  Com-
              mand-dependency checking is automatically suppressed  for  lines
              that  contain  this  macro, just as if the command had been pre-
              fixed with a `?'.  See the description of  `?',  under  Makefile
              Special  Tokens,  above.   You  can  force this check with the !
              command-line prefix.

       $%     The name of the library member being  processed.   (See  Library
              Maintenance, below.)

       To  refer to the $@ dynamic macro within a dependency list, precede the
       reference with an additional `$' character  (as  in,  `$$@').   Because
       make assigns $<&lt; and $* as it would for implicit rules (according to the
       suffixes list and the directory contents), they may be unreliable  when
       used within explicit target entries.

       These  macros  can be modified to apply either to the filename part, or
       the directory part of the strings they stand for, by  adding  an  upper
       case  F  or D, respectively (and enclosing the resulting name in paren-
       theses or braces).  Thus, `$(@D)' refers to the directory part  of  the
       string  `$@';  if  there is no directory part, `.'  is assigned.  $(@F)
       refers to the filename part.

   Conditional Macro Definitions
       A macro definition of the form:

              target-list := macro = value

       indicates that when processing any of  the  targets  listed  and  their
       dependencies  , macro is to be set to the value supplied.  Note that if
       a conditional macro is referred to in a dependency list, the $ must  be
       delayed  (use  $$ instead).  Also, target-list may contain a % pattern,
       in which case the macro will be conditionally defined for  all  targets
       encountered  that  match  the pattern.  A pattern replacement reference
       can be used within the value.

       You can temporarily append to a macro's value with a conditional  defi-
       nition of the form:

              target-list := macro += value

   Predefined Macros
       make  supplies the macros shown in the table that follows for compilers
       and their options, host  architectures,  and  other  commands.   Unless
       these macros are read in as environment variables, their values are not
       exported by make.  If you run make with any of these set in  the  envi-
       ronment,  it  is a good idea to add commentary to the makefile to indi-
       cate what value each is expected to take.  If -r  is  in  effect,  make
       does  not read the default makefile (./default.mk or <&lt;make/default.mk>&gt;)
       in which these macro definitions are supplied.
                        Table of Predefined Macros

            Use     Macro             Default Value

       Library       AR           ar
       Archives      ARFLAGS      rv

       Assembler     AS           as
       Commands      ASFLAGS
                     COMPILE.s    $(AS) $(ASFLAGS) $(TARGET_MACH)
                     COMPILE.S    $(CC) $(ASFLAGS) $(CPPFLAGS) $(TARGET_MACH) -c

       C   Compiler  CC           cc
       Commands      CFLAGS
                     COMPILE.c    $(CC) $(CFLAGS) $(CPPFLAGS) -target
                                       $(TARGET_ARCH:-%=%) -c
                     LINK.c       $(CC) $(CFLAGS) $(CPPFLAGS) $(LDFLAGS)
                                       -target $(TARGET_ARCH:-%=%)

       FORTRAN 77    FC           f77
       Compiler      FFLAGS
       Commands      COMPILE.f    $(FC) $(FFLAGS) $(TARGET_ARCH) -c
                     LINK.f       $(FC) $(FFLAGS) $(TARGET_ARCH) $(  LDFLAGS)
                     COMPILE.F    $(FC) $(FFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
                     LINK.F       $(FC) $(FFLAGS) $(CPPFLAGS) $(LDFLAGS)

       Link Editor   LD           ld
       Command       LDFLAGS

       lex           LEX          lex
       Command       LFLAGS
                     LEX.l        $(LEX) $(LFLAGS) -t

       lint          LINT         lint
       Command       LINTFLAGS
                     LINT.c       $(LINT) $(LINTFLAGS) $(CPPFLAGS) $(TARGET_ARCH)

       Modula 2      M2C          m2c
       Commands      M2FLAGS
                     COMPILE.def  $(M2C) $(M2FLAGS) $(DEFFLAGS) $(TARGET_ARCH)
                     COMPILE.mod  $(M2C) $(M2FLAGS) $(MODFLAGS) $(TARGET_ARCH)

       Pascal        PC           pc
       Compiler      PFLAGS
       Commands      COMPILE.p    $(PC) $(PFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
                     LINK.p       $(PC) $(PFLAGS) $(CPPFLAGS) $(LDFLAGS)

       Ratfor        RFLAGS
       Compilation   COMPILE.r    $(FC) $(FFLAGS) $(RFLAGS) $(TARGET_ARCH) -c
       Commands      LINK.r       $(FC) $(FFLAGS) $(RFLAGS) $(TARGET_ARCH)

       rm            RM           rm -f

       sccs          SCCSFLAGS
       Command       SCCSGETFLAGS -s

       yacc          YACC         yacc
       Command       YFLAGS
                     YACC.y       $(YACC) $(YFLAGS)

       Suffixes      SUFFIXES     .o .c .c~ .s .s~ .S .S~ .ln .f .f~ .F .F~ .l
       List                       .l~ .mod .mod~ .sym .def .def~ .p .p~ .r .r~
                                  .y .y~ .h .h~ .sh .sh~ .cps .cps~

   Implicit Rules
       When a target has no entry in the makefile, make attempts to  determine
       its class (if any) and apply the rule for that class.  An implicit rule
       describes how to build any target of a given class, from an  associated
       dependency  file.   The class of a target can be determined either by a
       pattern, or by a suffix; the corresponding dependency  file  (with  the
       same basename) from which such a target might be built.  In addition to
       a predefined set of implicit rules, make allows you to define your own,
       either by pattern, or by suffix.

   Pattern Matching Rules
       A target entry of the form:

              tp%ts:  dp%ds

       is  a  pattern  matching  rule, in which tp is a target prefix, ts is a
       target suffix, dp is a dependency prefix, and ds is a dependency suffix
       (any  of  which  may  be null).  The % stands for a basename of zero or
       more characters that is matched in the target, and is used to construct
       the  name  of a dependency.  When make encounters a match in its search
       for an implicit rule, it uses the rule in that target  entry  to  build
       the  target  from the dependency file.  Pattern-matching implicit rules
       typically make use of the $@ and $<&lt; dynamic macros as placeholders  for
       the target and dependency names.  Other, regular dependencies may occur
       in the dependency list.  An entry of the form:

              tp%ts:   [dependency ...]   dp%ds   [dependency ...]

       is a valid pattern matching rule.

   Suffix Rules
       When no pattern matching rule applies, make checks the target  name  to
       see  if  it ends with a suffix in the known suffixes list.  If so, make
       checks for any suffix rules, as well as a  dependency  file  with  same
       root and another recognized suffix, from which to build it.

       The target entry for a suffix rule takes the form:


       where  Ts  is  the suffix of the target, Ds is the suffix of the depen-
       dency file, and rule is the rule for building a target  in  the  class.
       Both  Ds  and  Ts must appear in the suffixes list.  (A suffix need not
       begin with a `.'  to be recognized.)

       A suffix rule with only one suffix describes how to build a target hav-
       ing  a  null  (or  no) suffix from a dependency file with the indicated
       suffix.  For instance, the .c rule could be used to build an executable
       program  named  file  from a C source file named `file.c'.  If a target
       with a null suffix has an explicit dependency, make  omits  the  search
       for a suffix rule.
                Table of Standard Implicit (Suffix) Rules

       Use         Implicit  Command Line(s)

       Assembly     .s.o    $(COMPILE.s) -o $@ $<
       Files        .s.a    $(COMPILE.s) -o $% $<
                            $(AR) $(ARFLAGS) $@ $%
                            $(RM) $%
                    .S.o    $(COMPILE.S) -o $@ $<
                    .S.a    $(COMPILE.S) -o $% $<
                            $(AR) $(ARFLAGS) $@ $%
                            $(RM) $%

       C            .c      $(LINK.c) -o $@ $< $(LDLIBS)
       Files        .c.ln   $(LINT.c) $(OUTPUT_OPTION) -i $<
                    .c.a    $(COMPILE.c) -o $% $<
                            $(AR) $(ARFLAGS) $@ $%
                            $(RM) $%

       FORTRAN 77  .f       $(LINK.f) -o $@ $< $(LDLIBS)
       Files       .f.o     $(COMPILE.f) $(OUTPUT_OPTION) $<
                   .f.a     $(COMPILE.f) -o $% $<
                            $(AR) $(ARFLAGS) $@ $%
                            $(RM) $%
                   .F       $(LINK.F) -o $@ $< $(LDLIBS)
                   .F.o     $(COMPILE.F) $(OUTPUT_OPTION) $<
                   .F.a     $(COMPILE.F) -o $% $<
                            $(AR) $(ARFLAGS) $@ $%
                            $(RM) $%

       lex         .l       $(RM) $*.c
       Files                $(LEX.l) $< > $*.c
                            $(LINK.c) -o $@ $*.c $(LDLIBS)
                            $(RM) $*.c
                   .l.c     $(RM) $@
                            $(LEX.l) $< > $@
                   .l.ln    $(RM) $*.c
                            $(LEX.l) $< > $*.c
                            $(LINT.c) -o $@ -i $*.c
                            $(RM) $*.c
                   .l.o     $(RM) $*.c
                            $(LEX.l) $< > $*.c
                            $(COMPILE.c) -o $@ $*.c
                            $(RM) $*.c

       Modula 2   .mod      $(COMPILE.mod) -o $@ -e $@ $<
       Files      .mod.o    $(COMPILE.mod) -o $@ $<
                  .def.sym  $(COMPILE.def) -o $@ $<

       NeWS       .cps.h    cps $*.cps

       Pascal     .p        $(LINK.p) -o $@ $< $(LDLIBS)
       Files      .p.o      $(COMPILE.p) $(OUTPUT_OPTION) $<

       Ratfor     .r        $(LINK.r) -o $@ $< $(LDLIBS)
       Files      .r.o      $(COMPILE.r) $(OUTPUT_OPTION) $<
                  .r.a      $(COMPILE.r) -o $% $<
                            $(AR) $(ARFLAGS) $@ $%
                            $(RM) $%

       SCCS       .SCCS_GET sccs $(SCCSFLAGS) get $(SCCSGETFLAGS) $@ -G$@

       Shell      .sh       cat $< >$@
       Scripts              chmod +x $@

       yacc       .y        $(YACC.y) $<
       Files                $(LINK.c) -o $@ y.tab.c $(LDLIBS)
                            $(RM) y.tab.c
                  .y.c      $(YACC.y) $<
                            mv y.tab.c $@
                  .y.ln     $(YACC.y) $<
                            $(LINT.c) -o $@ -i y.tab.c
                            $(RM) y.tab.c
                  .y.o      $(YACC.y) $<
                            $(COMPILE.c) -o $@ y.tab.c
                            $(RM) y.tab.c

       make  reads  in  the  standard  set  of  implicit  rules  from the file
       <&lt;make/default.mk>&gt;, unless -r is in effect, or  there  is  a  default.mk
       file in the local directory that does not include that file.

   The Suffixes List
       The  suffixes  list is given as the list of dependencies for the `.SUF-
       FIXES:' special-function target.  The default list is contained in  the
       SUFFIXES macro (See Table of Predefined Macros for the standard list of
       suffixes).  You can define additional .SUFFIXES: targets;  a  .SUFFIXES
       target with no dependencies clears the list of suffixes.  Order is sig-
       nificant within the list; make selects a rule that corresponds  to  the
       target's suffix and the first dependency-file suffix found in the list.
       To place suffixes at the head of the list, clear the list  and  replace
       it with the new suffixes, followed by the default list:

              .SUFFIXES: suffixes $(SUFFIXES)

       A tilde (~) indicates that if a dependency file with the indicated suf-
       fix (minus the ~) is under SCCS  its  most  recent  version  should  be
       retrieved, if necessary, before the target is processed.

   Library Maintenance
       A target name  of the form:

              lib(member ...)

       refers  to a member, or a space-separated list of members, in an ar(1V)

       The dependency of the library member on the corresponding file must  be
       given  as  an explicit entry in the makefile.  This can be handled by a
       pattern matching rule of the form:

              lib(%.s): %.s

       where .s is the suffix of the member; this suffix is typically  .o  for
       object libraries.

       A target name of the form


       refers  to  the  member  of a randomized object library (see ranlib(1))
       that defines the entry point named symbol.

   Command Execution
       Command lines are executed one at a time, each by its  own  process  or
       shell.  Shell commands, notably cd, are ineffectual across an unescaped
       NEWLINE in the makefile.  A line is  printed  (after  macro  expansion)
       just  before  being  executed.   This is suppressed if it starts with a
       `@', if there is a `.SILENT:' entry in the makefile, or if make is  run
       with  the -s option.  Although the -n option specifies printing without
       execution, lines containing the macro $(MAKE) are executed  regardless,
       and  lines  containing  the  @  special  character are printed.  The -t
       (touch) option updates the modification date of a file without  execut-
       ing  any  rules.   This can be dangerous when sources are maintained by
       more than one person.

   Bourne Shell Constructs
       To use the Bourne shell if control structure for branching, use a  com-
       mand line of the form:
              if expression ; \
              then command ; \
                   ... ; \
              else ; \
                   ... ; \

       Although  composed  of several input lines, the escaped NEWLINE charac-
       ters insure that make treats them all as one (shell) command line.

       To use the Bourne shell for control structure for loops, use a  command
       line of the form:
              for var in list ; \
                   do command; \
                   ... ;\"

       To  refer  to  a shell variable, use an escaped dollar-sign (\$).  This
       prevents expansion of the dollar-sign by make.

   Command Substitutions
       To incorporate the standard output of a shell command in a macro, use a
       definition of the form:

              MACRO:sh =command

       The  command is executed only once, standard error output is discarded,
       and NEWLINE characters are replaced with SPACEs.  If the command has  a
       non-zero exit status, make halts with an error.

       To  capture  the  output of a shell command in a macro reference, use a
       reference of the form:


       where MACRO is the name of a macro containing a valid Bourne shell com-
       mand  line.   In this case, the command is executed whenever the refer-
       ence is evaluated.  As with shell command substitutions, the  reference
       is  replaced  with  the standard output of the command.  If the command
       has a non-zero exit status, make halts with an error.

       INT and QUIT signals received from the keyboard halt  make  and  remove
       the target file being processed unless that target is in the dependency
       list for `.PRECIOUS:'.

       This makefile says that pgm depends on two files a.o and b.o, and  that
       they  in  turn depend on their corresponding source files (a.c and b.c)
       along with a common file incl.h:
              pgm: a.o b.o
                     $(LINK.c) -o $@ a.o b.o
              a.o: incl.h a.c
                     cc -c a.c
              b.o: incl.h b.c
                     cc -c b.c

       The following makefile uses implicit rules to express the  same  depen-
              pgm: a.o b.o
                     cc a.o b.o -o pgm
              a.o b.o: incl.h

       Makefile            current version(s) of make description file
       SCCS/s.Makefile     SCCS history files for the above makefile(s)
       default.mk          default  file for user-defined targets, macros, and
                           implicit rules
       <&lt;make/default.mk>&gt;   makefile for standard  implicit  rules  and  macros
                           (not read if default.mk is)
       .make.state         state file in the local directory

       ar(1V), cc(1V), cd(1), sccs-get(1), lex(1), ranlib(1), passwd(5)

       make returns an exit status of 1 when it halts as a result of an error.
       Otherwise it returns an exit status of 0.

       Do not know how to make target. Stop.
              There is no makefile  entry  for  target,  and  none  of  make's
              implicit  rules apply (there is no dependency file with a suffix
              in the suffixes list, or the  target's  suffix  is  not  in  the

       *** target removed.
              make was interrupted while building target.  Rather than leaving
              a partially-completed version that is newer than  its  dependen-
              cies, make removes the file named target.

       *** target not removed.
              make  was  interrupted  while building target and target was not
              present in the directory.

       *** target could not be removed, reason
              make was  interrupted  while  building  target,  which  was  not
              removed for the indicated reason.

       Read of include file `file' failed
              The makefile indicated in an include directive was not found, or
              was inaccessible.

       Loop detected when expanding macro value `macro'
              A reference to the macro being defined was found in the  defini-

       Could not write state file `file'
              You  used the .KEEP_STATE: target, but do not have write permis-
              sion on the state file.

       *** Error code n
              The previous shell command returned a nonzero error code.

       *** signal message
              The previous shell command was aborted due to a signal.   If  `-
              core dumped' appears after the message, a core file was created.

       Conditional macro conflict encountered
              Displayed only when -d is in effect, this message indicates that
              two or more parallel targets currently being processed depend on
              a target which is built differently for each by virtue of condi-
              tional macros.  Since the target cannot  simultaneously  satisfy
              both dependency relationships, it is conflicted.

       Some  commands  return nonzero status inappropriately; to overcome this
       difficulty, prefix the offending command line in the rule with a `-'.

       Filenames with the characters `=', `:', or `@', do not work.

       You cannot build file.o from lib(file.o).

       Options supplied by MAKEFLAGS should be reported for nested  make  com-
       mands.   Use  the -d option to find out what options the nested command
       picks up from MAKEFLAGS.

       This version of make is incompatible in certain respects with  previous

              o  The  -d  option  output is much briefer in this version.  -dd
                 now produces the equivalent voluminous output.

              o  make attempts to derive values for the dynamic  macros  `$*',
                 `$<&lt;',  and  `$?', while processing explicit targets.  It uses
                 the same method as for implicit rules; in some cases this can
                 lead  either to unexpected values, or to an empty value being
                 assigned.  (Actually, this was true for earlier  versions  as
                 well, even though the documentation stated otherwise.)

              o  make  no  longer searches the current directory for SCCS his-
                 tory files.

              o  Suffix replacement in macro references are now applied  after
                 the macro is expanded.

       There  is  no guarantee that makefiles created for this version of make
       will work with earlier versions.

       If there is no default.mk file in the current directory, and  the  file
       <&lt;make/default.mk>&gt; is missing, make stops before processing any targets.
       To force make to run anyway, create an empty  default.mk  file  in  the
       current directory.

       Once  a dependency is made, make assumes the dependency file is present
       for the remainder of the run.  If a rule subsequently removes that file
       and  future  targets  depend  on  its  existence, unexpected errors may

       When hidden dependency checking is in effect,  the  $?   macro's  value
       includes  the  names of hidden dependencies.  This can lead to improper
       filename arguments to commands when $?  is used in a rule.

       Pattern replacement macro references cannot be used in  the  dependency
       list of a pattern matching rule.

       Unlike  previous  versions,  this version of make strips a leading `./'
       from the value of the `$@' dynamic macro.

       With automatic SCCS retrieval, this version of make  does  not  support
       tilde suffix rules.

       The  only dynamic macro whose value is strictly determined when used in
       a dependency list is $@ (takes the form `$$@').

       make invokes the shell with the -e  (exit-on-errors)  argument.   Thus,
       with semicolon-separated command sequences, execution of the later com-
       mands depends on the success of the former.  This  is  consistent  with
       make's  behavior of halting immediately when a problem occurs, but can-
       not be inferred from the syntax of the rule alone.

                               15 September 1989                       MAKE(1)